Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-03
2007-07-03
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S718000
Reexamination Certificate
active
10256839
ABSTRACT:
A parallel test device for testing a DUT includes a controller that has a test procedure useful for both sequential and parallel testing, a test regimen that includes a parallel procedure, and a parallel wrapper applied to the test procedure to provide the parallel procedure; and a plurality of test instruments that test the DUT in response to the controller.
REFERENCES:
patent: 4639664 (1987-01-01), Chiu et al.
patent: 5543727 (1996-08-01), Bushard et al.
patent: 5744948 (1998-04-01), Swart
patent: 5969538 (1999-10-01), Whetsel
patent: 6092225 (2000-07-01), Gruodis et al.
patent: 6158032 (2000-12-01), Currier et al.
patent: 6196677 (2001-03-01), Spano
patent: 6681351 (2004-01-01), Kittross et al.
patent: 6766486 (2004-07-01), Neeb
patent: 2003/0191996 (2003-10-01), Mukherjee et al.
Lockhart, Regression Test Procedure, PostgreSQL Inc., chapter 34, pp. 1-2, 2000.
Gandhi Dipakkumar
Keithley Instruments Inc.
Pearne & Gordon LLP
LandOfFree
Parallel test system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Parallel test system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel test system and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3816294