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Initializing and saving peripheral device configuration...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Initializing/diagnosing system in on-chip multiprocessor system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Injection of selected numbers of errors in returned loopback...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Input control device and input control method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Input data capture boundary cell connected to target circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input switching arrangement for a semiconductor circuit and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input-output device testing including initializing and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input-output device testing including voltage tests

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input-output pad testing using bi-directional pads

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Input/output boundary cells and output data summing scan cell

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input/output buffer test circuitry and leads additional to...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input/output characterization chain for an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Input/output compression test circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Input/output continuity test mode circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Inspection data analyzing apparatus for in-line inspection with

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Installation of computer programs using disk mirroring

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Instruction processing pattern generator controlling an integrat

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Instruction-based built-in self-test (BIST) of external memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Instrument initiated communication for automatic test equipment

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Instrumentation system having a reconfigurable...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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