Input switching arrangement for a semiconductor circuit and...

Details Input switching arrangement for a semiconductor circuit and... Input switching arrangement for a semiconductor circuit and...

2007-12-11

2007-12-11

Kerveros, James C. (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10988541

ABSTRACT:
Transfer switching devices, which supplement unidirectional input switching arrangements or pad circuits are employed to route an internal test signal to the input of an input driver in the unidirectional input switching arrangement and to couple the internal test signal to an internal switching logic unit. The transfer switching devices are controlled via a multiplexer unit, which can be programmed directly using boundary scan registers. The present invention allows all unidirectional pad circuits or input drivers to be tested in the course of a reduced I/O test method for semiconductor circuits, in which testing internal circuits in the semiconductor circuit involves only a subset of the signal connections associated with the input drivers being coupled to a test apparatus.

REFERENCES:
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patent: 5594694 (1997-01-01), Roohparvar et al.
patent: 6397361 (2002-05-01), Saitoh
patent: 6421801 (2002-07-01), Maddux et al.
patent: 6477674 (2002-11-01), Bates et al.
patent: 2003/0030461 (2003-02-01), Oberle et al.
patent: 09257884 (1997-10-01), None

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