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Generating device, generating method, program and recording...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating device, generating method, program and recording...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating log-likelihood values in a maximum a posteriori...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Generating netlist test vectors by stripping references to a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating reliability values for iterative decoding of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Generating responses to patterns stimulating an electronic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating responses to patterns stimulating an electronic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating special uncorrectable error codes for failure...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Generating test coverage bin based on simulation result

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating test input for a circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating test patterns used in testing semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating test patterns used in testing semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generating test patterns used in testing semiconductor...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generation of decision feedback equalizer data using trellis...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Generation of memory test patterns for DLL calibration

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Generation of reproducible random initial states in RTL simulato

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generation of test vectors for testing electronic circuits...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generator/compactor scan circuit low power adapter

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generator/compactor scan circuit low power adapter with counter

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Generic debug external connection (GDXC) for high...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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