Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-05-29
2007-05-29
Britt, Cynthia (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C703S014000, C716S030000
Reexamination Certificate
active
11239414
ABSTRACT:
Selected test pattern sequences to be used in transient power supply current testing to detect path delay faults in an IC are easily and rapidly generated. A stored fault list of path delay faults is prepared. A train of transition signal values is calculated by simulation of transitions occurring in the IC when a test pattern sequence is applied to the IC, and respective path delay fault in the stored fault list is determined whether it is a detectable fault that is capable of being detected by the transient power supply current testing by using the transition signal values. Those detectable faults that exist in the stored fault list are deleted from the stored fault list and those test pattern sequences that are used to detect the detectable faults existing in the stored fault list are registered in a test pattern sequence list as the selected test pattern sequence.
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Ishida Masahiro
Yamaguchi Takahiro
Advantest Corporation
Britt Cynthia
Gallagher & Lathrop
Lathrop, Esq. David N.
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