LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling

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Dynamic minimum-memory interleaving

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

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Dynamic offset compensation based on false transitions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision

Reexamination Certificate

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Dynamic offset compensation based on false transitions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision

Reexamination Certificate

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Dynamic parity inversion for I/O interconnects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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Dynamic parity inversion for I/O interconnects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control

Reexamination Certificate

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Dynamic parity inversion for I/O interconnects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control

Reexamination Certificate

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Dynamic power adjusting device for viterbi decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic random access memory having at least two buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic random access memory having at least two buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic redundancy for random access memory assemblies

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

Patent

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Dynamic scan chains and test pattern generation...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Dynamic scan circuitry for A-phase

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Dynamic semiconductor memory device and method of testing the sa

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Patent

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Dynamic soft-error-rate discrimination via in-situ...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Dynamic sparing during normal computer system operation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic synchronization of data capture on an optical or...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic variable-length error correction code

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Dynamic verification traversal strategies

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Dynamically changing forward error correction and automatic requ

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Patent

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Dynamically determining a buffer-stack overrun

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

[ 0.00 ] – not rated yet Voters 0 Comments 0

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