Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-02-28
2010-02-02
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S763000
Reexamination Certificate
active
07657818
ABSTRACT:
Minimum-memory-implementation is available with any depth and period in DSL interleaving/deinterleaving, always allowing the minimum amount of memory to be used in both transmitter and receiver without loss of performance or of basic triangular structure, even if the interleaver/deinterleaver parameters change dynamically. A novel cell-scheduling process ensures availability of the minimum amount of memory (or any other desired memory usage) to implement an image of the perfect triangle and works for any co-prime depth and interleaver period. Minimal memory use may be further characterized by a simple off-line method that determines an addressing order for each of the memory cells in a minimum-memory (or other) implementation of an interleaver/deinterleaver according to the invention. Time variation of interleaver depth in operation can be accommodated easily with absolute minimum memory requirement at all time instants.
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Cioffi John M.
Ginis Georgios
Adaptive Spectrum and Signal Alignment, Inc.
Blakely , Sokoloff, Taylor & Zafman LLP
Ton David
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