Channel interface and protocols for cache coherency in a...

Channel interleaving/de-interleaving apparatus in a...

Channel processing data without leading sync mark

Channel processor using reduced complexity LDPC decoder

Channel quality circuit in a sampled amplitude read channel

Channel quality estimator based on non-redundant error correctio

Characteristic image of electrical data bus

Characterizing jitter sensitivity of a...

Chase iteration processing for decoding input data

Check bit free error correction for sleep mode data retention

Check codes mapped across multiple frames

Check codes mapped across multiple frames

Check matrix generation method and check matrix generation...

Check matrix generation method and check matrix generation...

Check method of temporary storage circuit in electronic...

Check sequence preservation

Check testing of an address decoder

Checkerboard parity techniques for a multi-pumped bus

Checksum calculator with tree structure of reduction stages

Checksum determination