Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2000-11-13
2003-08-26
Ton, David (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S718000
Reexamination Certificate
active
06611931
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a check method of a temporary storage circuit in an electronic control unit for an automobile using a microcomputer for checking the read operation and the write operation of the temporary storage circuit in the electronic control unit for an automobile.
FIG. 5
is a block diagram to show a summary of the internal configuration of a general microcomputer. In a microcomputer MC used with an electronic control unit for an automobile, as shown in
FIG. 5
, a CPU (central control unit)
3
reads software programs and various data previously stored in ROM (read-only memory)
1
through a register
2
and executes various logical operations based on the software programs and data. At the time, the information in the ROM
1
, various pieces of information given from the outside, or the operation processing result, etc., of the CPU
3
is once stored in a temporary storage circuit (RAM (random access memory))
4
and the CPU
3
uses the information in the RAM
4
to perform operation processing, whereby the whole processing speed is increased. Therefore, the RAM
4
is indispensable for the CPU
3
to perform operation processing and it is extremely important for the RAM
4
to operate normally.
By the way, generally the RAM
4
is often checked for error at the product shipment. After the product shipment, a part of the RAM
4
may become unable to operate normally for some reason of noise, etc., in which case it may be feared that an anomaly may occur in program processing. Particularly, in electronic devices for an automobile, a malfunction caused by an anomaly of the RAM
4
must be absolutely avoided, thus it is more important than anything else to check that the RAM
4
is normal.
Thus, in fact, when the microcomputer MC is started, it is necessary to check whether or not the RAM
4
operates normally together with operation check of the register
2
.
To check the RAM
4
, in a related art, predetermined data is once written into all addresses in the RAM
4
, next the data at the first address is read and whether or not the data is the same as the original data is checked. Subsequently, the address is incremented in order and a similar check is executed on the whole areas of the RAM
4
, whereby a check can be made to ensure that the whole RAM
4
is normal.
Specifically, when the RAM
4
is checked, as shown in
FIG. 6
, first at step So
1
, the top address of the RAM
4
is set in a predetermined 16-bit register part in the register
2
, which will be hereinafter referred to as HL register. At step So
2
, a numeric value “00000000” (the 8-bit numeric value “00000000” will be hereinafter abbreviated to “00H (hexa)) is stored in a predetermined eight-bit (one-byte) register part, which will be hereinafter referred to as A register, different from the HL register for resetting the A register. Subsequently, at step So
3
, predetermined specific data (data) is stored in the A register. At step So
4
, the data in the A register is written into “HL” address of the HL register and step So
5
, the numeric value “00H” is stored in the A register for resetting, then at step So
6
, the data stored at the “HL” address of the HL register is read into the A register.
At step So
7
, whether or not the current value of the A register is the same as the value of the first “data” is determined. If the current value of the A register is the same as the value of the first “data,” control goes to step So
8
and whether or not the address “HL” is the end address of the RAM
4
is determined. If the address “HL” is not the end address, control goes to step So
9
and the “HL” address of the HL register is incremented and control returns to step So
2
and processing is repeated.
If the value of the A register is not the same as the value of the first “data” at step So
7
, it is assumed that an error occurs in the RAM
4
, and control goes to step So
10
and predetermined error handling is executed.
Thus, the processing at step So
2
and the later steps is repeated until the address “HL” reaches the end address of the RAM
4
and when the address “HL” reaches the end address, a transition to the next processing as the microcomputer MC is made (step So
11
).
In
FIG. 5
, numeral
5
denotes an input I/F (interface) circuit for inputting an external signal to the CPU
3
and numeral
6
denotes an output I/F (interface) circuit for sending the operation processing result of the CPU
3
to the outside. The above-described “HL” means that two eight-bit unit registers of high-order eight bits (H) and the low-order eight bits (L) are used to handle one 16-bit (two-byte) data string.
However, in recent years, the program data has become huge and thus the area of the RAM
4
in the microcomputer MC has also become huge and often it has taken a great deal of processing time in checking the RAM
4
. Particularly, if whether or not the value of the A register is the same as the value of the first “data” is determined for every address “HL” of the HL register as at step So
7
in
FIG. 6
, it is indispensable that the processing time becomes enormous. Thus, the initialization time is prolonged and the transition to the main program is delayed. Consequently, a delay occurs in the control system and there is a possibility that the machine operation may be hindered.
For example, with the electronic control unit for performing head lamp drive processing, if an instantaneous power interruption or reset occurs with the head lamps on during running, a disadvantage of prolonging the time to again turning on the head lamps or the like occurs if the initial processing takes a long time.
This invention relates to a check method of a storage circuit in an electronic control unit for an automobile using a microcomputer for checking the read operation and the write operation of the storage circuit in the electronic control unit for an automobile.
FIG. 11
is a block diagram to show a summary of the internal configuration of a general microcomputer. In a microcomputer MC used with an electronic control unit for an automobile, as shown in
FIG. 11
, a CPU (central control unit)
203
reads software programs and various data previously stored in a storage circuit (ROM (read-only memory))
201
through a register
202
and executes various logical operations based on the software programs and data. At the time, the information in the ROM
201
or the operation processing result, etc., of the CPU
203
is once stored in RAM (random access memory)
204
and the CPU
203
uses the information in the RAM
204
to perform operation processing.
In
FIG. 11
, numeral
205
denotes an input I/F (interface) circuit for inputting an external signal to the CPU
203
and numeral
206
denotes an output I/F (interface) circuit for sending the operation processing result of the CPU
203
to the outside.
With the electronic control unit for an automobile, the CPU
203
takes charge of drive control of various drive systems and thus operates on a major premise that the CPU
203
does not malfunction to ensure sufficient safety of running the automobile. Therefore, it is indispensable that the software programs, etc., previously stored in the ROM
201
should be read into the CPU
203
unerringly. Thus, when the microcomputer MC is started, it is important to check whether or not the software programs, data, and the like are read unerringly from the ROM
201
as well as to check the register
202
and the RAM
204
for operation.
To check the ROM
201
, addition operation is performed on the program data corresponding to each address in order and is repeated to the end of the program, then the last low-order 16-bit (two-byte) data is compared with reference data previously stored in a predetermined area of the ROM
201
, whereby the ROM
201
can be checked easily.
FIG. 12
is a flowchart to show the operation after the microcomputer MC is started. First, after the power of the microcomputer MC is turned on or reset is released, initialization is executed at step Sp
201
. Specifically, at step S
Autonetworks Technologies Ltd.
Ton David
LandOfFree
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