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Backmatch resistor structure for an integrated circuit tester

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Backplane connector apparatus and method

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Bi-directional interface and communication link

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Bi-directional output buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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BICMOS output buffer circuit having overshoot protection

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Bidirectional signal transmission circuit and terminator

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Bidirectional transmission line driver/receiver

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Binary weighted reference circuit for a variable impedance outpu

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Binary weighted thermometer code for PVT controlled output...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Bonding option circuit having no pass-through current

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Broadband matching technique for high speed logic and high resol

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Broadly distributed termination for buses using switched termina

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Buffer circuit with current limiting

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Bus configuration and input/output buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Bus controller

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Bus modem for building and industrial electrical systems

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Bus system

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Bus system and circuit board

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Bus termination scheme for flexible uni-processor and dual...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate

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Bus termination scheme having concurrently powered-on...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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