Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1995-01-23
1996-11-26
Hudspeth, David R.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 82, 375316, H03K 190175
Patent
active
055789390
ABSTRACT:
A method and apparatus are disclosed for sending and receiving logic signals. A driver is connected to a first end of a transmission line with a predetermined impedance and first and second transmission line ends for communicating the logic signals. The driver has a source for sending the logic signals, and a reference generator connected to the source for setting the magnitude of the signals sent by the source. A receiver is connected to the second transmission line end, and has a transmission line terminator for sinking the signals, and a reference generator connected to the terminator for setting a bias of the terminator to establish a certain family of terminator impedances for sinking the signals. The driver reference generator and the receiver reference generator interactively match the terminator impedance to the transmission line for the set magnitude of the signals.
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Beers Gregory E.
Frankeny Richard F.
Smadi Mithkal M.
Hudspeth David R.
Salys Casimer K.
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