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Memory control circuit, memory control method, and...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory controller calibration

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory controller that controls termination in a memory device

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory module and method having improved signal routing...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory module and method having improved signal routing...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory module system with efficient control of on-die...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory module using DRAM package to match channel impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory module with dynamic termination using bus switches...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory system with stable termination of a pair of...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Memory systems and memory access methods

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for active line termination

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for active termination of a line driver/rec

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for calibrating driver impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for calibrating driver impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for CAN bus auto-termination

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for compensated slew rate control of...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for controlling output impedance

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for controlling termination of current driv

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for coupling an input node to an output...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Method and apparatus for driving a signal using switchable...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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