Buffer circuit with current limiting

Details Buffer circuit with current limiting Buffer circuit with current limiting

2007-09-18

2007-09-18

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S086000

Reexamination Certificate

active

11094974

ABSTRACT:
A buffer circuit is configured to generate an output signal which is a function of an input signal received by the buffer circuit, the buffer circuit being selectively operative in one of at least two modes in response to a control signal. In a first mode, the buffer circuit is configured to provide a low output impedance, characteristic of a digital buffer. In a second mode, the buffer circuit is configured to limit an output current of the buffer circuit. The control signal is indicative of a level of the output signal of the buffer circuit.

REFERENCES:
patent: 6133755 (2000-10-01), Huang et al.
patent: 6229335 (2001-05-01), Huang et al.

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