BICMOS output buffer circuit having overshoot protection

Details BICMOS output buffer circuit having overshoot protection BICMOS output buffer circuit having overshoot protection

1994-09-19

1996-03-05

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

326 26, 326 84, H03K 19003

Patent

active

054971063

ABSTRACT:
A BICMOS output buffer circuit (20) has a voltage converter (21), a reference voltage circuit (28), a driver circuit (24), and a clamping circuit (40). The reference voltage circuit (28) receives a regulated voltage and provides a reference voltage having a low voltage level and a high voltage level. The low voltage level and the high voltage level control the logic high voltage of an output data signal. During a transition from a logic low voltage to a logic high voltage of the output data signal, the output data signal is allowed to overshoot the low voltage level. After the transition is complete, the output data signal settles at the high voltage level. This limits the amount of overshoot of the output data signal. The clamping circuit (40) dampens the oscillations of the output signal.

REFERENCES:
patent: 4847522 (1989-07-01), Fuller et al.
patent: 5184033 (1993-02-01), Chiao et al.
patent: 5287308 (1994-02-01), Oh

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