High speed product term allocation structure supporting logic it
High speed product term assignment for output enable, clock, inv
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable macrocell with combined path for storage
High speed tristate bus with multiplexers for selecting bus driv
High speed zero DC power programmable logic device (PLD)...
High speed, low noise output buffer with non-identical pairs of
High speed, low power macrocell
High throughput FPGA control interface
High-bandwidth interconnect network for an integrated circuit
High-density erasable programmable logic device architecture usi
High-density erasable programmable logic device architecture usi
High-density erasable programmable logic device architecture usi
High-density programmable logic device with flexible local...
High-performance interconnect
High-performance interconnect
High-performance programmable logic architecture