High speed, low power macrocell

Details High speed, low power macrocell High speed, low power macrocell

1995-03-08

1996-06-04

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 17, H03K 19177

Patent

active

055237061

ABSTRACT:
A macrocell for use in a programmable logic device (PLD) providing for enhanced logic capability and reduced setup time. The preferred embodiment of the macrocell includes two look-up tables, for increased fan-in, and two flip-flops that increase fan-out, thereby doubling logic capability of the PLD without unacceptably increasing device size. Doubling the register count makes this PLD particularly suitable for applications employing high density sequential logic. Furthermore, a second register can be used for receiving fast input signals form an input to the PLD to reduce setup time.

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