Precharged adiabatic pipelined logic

Prevention of metastability in bistable circuits

Process variation tolerant circuit with voltage...

Programmable array clock/reset resource

Programmable clock delay

Programmable clock signal generation circuits and methods...

Programmable driver delay

Programmable logic device with logic signal delay...

Programmable timing boundary in dynamic circuits

Pseudo CMOS dynamic logic with delayed clocks

Pseudo CMOS dynamic logic with delayed clocks

Pseudo-CMOS dynamic logic with delayed clocks

Pseudo-dynamic latch deracer

Pseudofooter circuit for dynamic CMOS (Complementary...

Pulse evaluate logic-latch

Pulse triggered static flip-flop having scan test

Pulse width modulation circuit

Pulsed circuit topology including a pulsed, domino flip-flop

Pulsed domino latches

Pulsed dynamic keeper gating