Pseudofooter circuit for dynamic CMOS (Complementary...

Details Pseudofooter circuit for dynamic CMOS (Complementary... Pseudofooter circuit for dynamic CMOS (Complementary...

2005-02-22

2005-02-22

Chang, Daniel D. (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S115000

Reexamination Certificate

active

06859071

ABSTRACT:
A pseudofooter circuit for a logic circuit includes a first FET (Field Effect Transistor) having a first source, a first drain, and a first gate, and a second FET having a second source, a second drain, and a second gate. The first source is connected to the second drain to become a first signal node. The first signal node is connected to at least one gate of an FET in the logic circuit. The first gate is connected to the second gate to become a second signal node receiving a second signal as an input signal. The second source is connected to ground. The first drain becomes a third signal node receiving a third signal as an input signal.

REFERENCES:
patent: 4843261 (1989-06-01), Chappell et al.
patent: 5440243 (1995-08-01), Lyon
patent: 5719818 (1998-02-01), Tovim et al.

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