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Instruction alignment unit employing dual instruction queues for

Electrical computers and digital processing systems: processing – Instruction alignment
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Instruction alignment unit for routing variable byte-length...

Electrical computers and digital processing systems: processing – Instruction alignment
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Instruction branch mispredict streaming

Electrical computers and digital processing systems: processing – Instruction fetching
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Instruction buffer and method of controlling the instruction...

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Instruction buffer for issuing instruction sets to an...

Electrical computers and digital processing systems: processing – Processing control – Branching
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Instruction cache alignment mechanism for branch targets...

Electrical computers and digital processing systems: processing – Instruction alignment
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Instruction cache association crossbar switch

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Instruction cache associative crossbar switch

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Instruction cache configured to provide instructions to a microp

Electrical computers and digital processing systems: processing – Processing control – Branching
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Instruction cache prefetch based on trace cache eviction

Electrical computers and digital processing systems: processing – Instruction fetching – Prefetching
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Instruction causing swap of base address from segment...

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
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Instruction code compression using instruction codes with...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Instruction code conversion apparatus creating an...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Instruction code conversion unit and information processing...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
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Instruction completion logic distributed among execution units f

Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
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Instruction control apparatus and method using micro program

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Instruction control apparatus for loading plurality of...

Electrical computers and digital processing systems: processing – Instruction fetching – Of multiple instructions simultaneously
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Instruction control device and method therefor

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Instruction control device and method therefor

Electrical computers and digital processing systems: processing – Instruction issuing – Simultaneous issuance of multiple instructions
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Instruction control device and method therefor

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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