Large table vectorized lookup by selecting entries of...

Last iteration loop branch prediction upon counter threshold...

Latency prediction in a pipelined microarchitecture

Latency tolerant pipeline synchronization

Latency tolerant pipeline synchronization

Layered counterflow pipeline processor with anticipatory control

Layered speculative request unit with instruction optimized...

Leading bit prediction with in-parallel correction

Length decode to detect one-byte prefixes and branch

Length decoder for variable length data

Limiting concurrent modification and execution of...

Limiting entries in load issued premature part of load...

Limiting entries in load reorder queue searched for snoop...

Limiting entries searched in load reorder queue to between...

Line predictor entry with location pointers and control...

Line-oriented reorder buffer configured to selectively store...

Line-plane broadcasting in a data communications network of...

Linear address extension and mapping to physical memory...

Linear vector computation

Link and fall-through address formation using a program...