Abort prioritization in a trace-based processor
Accelerated multimedia processor
Accelerating vector processing using plural sequencers to...
Accelerator load balancing with dynamic frequency and...
Accessing a test condition for multiple sub-operations using...
Accessing byte lines from dual memory blocks and aligning...
Accessing items of architectural state from a register cache...
Accessing tables in memory banks using load and store...
Accumulator read port arbitration logic
Accumulator-based load-store CPU architecture implementation...
Accuracy of correlation prefetching via block correlation...
Accuracy of multiple branch prediction schemes
Accurate high speed digital signal processor
Accurate high speed digital signal processor
Acknowledgement mechanism for just-in-time delivery of load...
Acquiring instruction addresses associated with performance...
Across-thread out of order instruction dispatch in a...
Activating a design test mode in a graphics card having...
Active memory command engine and method
Active memory command engine and method