RISC microprocessor architecture implementing multiple typed...

RISC microprocessor architecture implementing multiple typed...

RISC microprocessor architecture implementing multiple typed...

RISC processor architecture with high performance context switch

RISC processor supporting one or more uninterruptible...

Risc processor using register codes for expanded instruction...

RISC processor with a debug interface unit

RISC type microprocessor and information processing apparatus

RISC86 instruction set

Rotation register for orthogonal data transformation

Rotator circular buffer with entries to store divided...

Routing protocol based redundancy design for shared-access...

Row and column enable signal activation of processing array...

Run-ahead program execution with value prediction

Run-time code compiler for data block transfer

Run-time node prefetch prediction in dataflow graphs

Run-time node prefetch prediction in dataflow graphs

Run-time parallelization of loops in computer programs by...

Run-time reconfiguration method for programmable units

Run-time selection of feed-back connections in a...