Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Reexamination Certificate
2007-01-30
2007-01-30
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
C712S241000, C717S160000
Reexamination Certificate
active
10736343
ABSTRACT:
Parallelization of loops is performed for loops having indirect loop index variables and embedded conditional statements in the loop body. Loops having any finite number of array variables in the loop body, and any finite number of indirect loop index variables can be parallelized. There are two particular limitations of the described techniques: (i) that there are no cross-iteration dependencies in the loop other than through the indirect loop index variables; and (ii) that the loop index variables (either direct or indirect) are not redefined in the loop body.
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U.S. Appl. No. 09/597,478, filed Jun. 20, 2000, International Business Machines Corporation.
Chan Eddie
England Anthony V. S.
Fiegle Ryan
International Business Machines - Corporation
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