Microprocessor apparatus and method for accelerating...

Microprocessor architecture capable of supporting multiple...

Microprocessor architecture capable of supporting multiple...

Microprocessor architecture with a switch network and an arbitra

Microprocessor arrangement for updating flag bits for...

Microprocessor cache redundancy scheme using store buffer

Microprocessor capable of carrying out different data length ins

Microprocessor capable of executing condition execution instruct

Microprocessor capable of unpacking packed data in response to a

Microprocessor circuit for portable data carriers and method...

Microprocessor circuits, systems, and methods for issuing succes

Microprocessor circuits, systems, and methods implementing a...

Microprocessor comprising bit concatenation means

Microprocessor configuration arrangement for selecting an...

Microprocessor configured to execute a prefetch instruction incl

Microprocessor configured to execute multiple threads including

Microprocessor configured to route instructions of a second inst

Microprocessor configured to translate instructions from one...

Microprocessor employing a fixed position dispatch unit

Microprocessor employing and method of using a control bit vecto