Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
1997-03-10
2001-05-01
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S229000, C712S043000, C710S066000, C713S002000
Reexamination Certificate
active
06226736
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to microprocessor-based systems. More particularly, the present invention relates to an arrangement and method for configuring a microprocessor-based apparatus for retrieving data from a program memory.
BACKGROUND OF THE INVENTION
In many microprocessor-based systems, a microprocessor retrieves and executes program instructions. These instructions are typically stored in a program memory having a bit-width selected for compatibility with the microprocessor. For example, in some applications, the program memory is eight bits wide, while in other applications, the program memory is sixteen bits wide. Typically, a different microprocessor is used for each different bit-width.
Some microprocessors can retrieve and execute instructions from a program memory having one of multiple possible bit-widths. The microprocessor-based system is typically configured to retrieve and execute the instructions using the appropriate bit-width.
Configuring the microprocessor to use the appropriate bit-width involves placing the microprocessor in a state determined by an indication of the bit-width of the program memory. Some techniques of providing this indication involves using external pins to set the microprocessor at one of several pre-defined states. These techniques often require a dedicated pin or a pull-up or pull-down resistor on a pin already used for another purpose. In certain application environments in which device size or pin count is an important consideration, these additional components use space or pins that could otherwise be eliminated or used for other purposes.
In some microprocessor-based systems, the bit-width used by the microprocessor to retrieve and execute instructions is set using a technique known as dynamic bus sizing. The microprocessor receives a signal indicating the bit-width of the program memory from the program memory when the microprocessor accesses the program memory. In many applications using dynamic bus sizing, the program memory and the microprocessor each use dedicated pins for respectively transmitting and receiving the signals. In applications in which it is desirable to maintain a minimal pin count, dynamic bus sizing uses pins that could otherwise be used for other purposes.
SUMMARY OF THE INVENTION
According to one embodiment, the present invention is directed to a microprocessor circuit arrangement that uses a set of instructions to select a memory configuration for retrieving program instructions. The microprocessor circuit arrangement comprises: a microprocessor having address signals generated to retrieve instructions and capable of executing a set of instructions in a start-up mode; a program memory storing the set of instructions using one of a plurality of possible bitwidths in noncontiguously-addressed memory locations selected such that a set of instructions can be retrieved, regardless of which bit-width is used in storing the set of instructions; and an address-mapping circuit configured to respond to a microprocessor-reset signal by mapping the address signals for retrieving the set of instructions regardless of which bit-width is used in storing the set of instructions, the set of instructions causing the microprocessor to select a memory configuration as a function of the bit-width and to reconfigure the address-mapping circuit for retrieving additional instructions, rather than the set of instructions. A microprocessor-based system for use with the microprocessor circuit arrangement is also provided.
According to another embodiment of the present invention, a microprocessor circuit arrangement is provided. The microprocessor circuit arrangement comprises: a microprocessor having address signals generated for retrieving instructions and capable of executing a set of instructions in a start-up mode; a memory management arrangement, responsive to the microprocessor and configured and arranged to generate the address signals, to retrieve the set of instructions, and to provide the instructions to the microprocessor; a program memory storing the set of instructions using one of a plurality of possible bit-widths in noncontiguously-addressed memory locations selected such that the set of instructions can be retrieved regardless of which bit-width is used in storing the set of instructions; and an address-mapping circuit, responsive to the memory management arrangement and configured and arranged to respond to a microprocessor-reset signal by mapping the address signals for retrieving the set of instructions regardless of which bit-width is used in storing the set of instructions. The set of instructions causes the microprocessor to select a memory configuration as a function of the bit-width used in storing the set of instructions and to reconfigure the address-mapping circuit for retrieving additional instructions rather than the set of instructions.
According to another embodiment of the present invention, a method configures a microprocessor-based system after reset. The method comprises: using the microprocessor-based system to generate first address signals for retrieving instructions; in response to a microprocessor-reset signal, mapping the first address signal for retrieving a set of instructions stored in a program memory using one of a plurality of possible bit-widths in noncontiguously-addressed memory locations selected such that a set of instructions can be retrieved regardless of which bit-width is used in storing the set of instructions; executing the set of instructions; in response to executing the set of instructions, selecting a memory configuration as a function of the bit-width; and reconfiguring the microprocessor-based system for retrieving additional instructions, rather than a set of instructions. An arrangement for use in connection with this method is also provided.
According to another method embodiment of the present invention, a method for configuring a microprocessor-based system comprises: storing a set of instructions in a program memory using one of a plurality of possible bit-widths in noncontiguously-addressed memory locations selected such that the set of instructions can be retrieved, regardless of which bit-width is used in storing the set of instructions; generating first address signals for retrieving instructions; in response to a microprocessor-reset signal, mapping the first address signal for retrieving the set of instructions, regardless of which bit-width is used in storing the set of instructions; executing the set of instructions; in response to executing the set of instructions, selecting a memory configuration as a function of the bit-width; and reconfiguring the microprocessor-based system for retrieving additional instructions rather than the set of instructions.
The above summary of the invention is not intended to describe each disclosed embodiment of the present invention. This is the purpose of the figures and of the detailed description that follows.
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Ian Hirschon, “Personal Supercomputing: Cray's ideas turn a PC into a virtual-memory 64-bit supercomputer”, Dr. Dobb's Journal, Jun. 1992.*
Statement by Applicant.
Crawford PLLC
Ellis Richard L.
Philips Semiconductors Inc.
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