Recursively accessing a branch target address cache using a...

Recycling long multi-operand instructions

Reduced size storage apparatus for storing cache-line-related da

Reducing branch prediction interference of opposite well...

Reducing data hazards in pipelined processors to provide...

Reducing inherited logical to physical register mapping...

Reducing multiplexer circuitry associated with a processor

Reducing multiplexer circuitry for operand select logic...

Reducing the fetch time of target instructions of a...

Reducing the fetch time of target instructions of a...

Register bit scanning

Register change summary resource

Register file backup queue

Register file backup queue

Register file backup queue

Register file backup queue

Register file backup queue

Register file backup queue

Register file bit and method for fast context switch

Register file in the register window system and controlling...