Reducing multiplexer circuitry for operand select logic...

Electrical computers and digital processing systems: processing – Processing control

Reexamination Certificate

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Reexamination Certificate

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07441105

ABSTRACT:
Methods and apparatus are provided for reducing the amount of resources allocated for handling multiplexing in a processor. Characteristics associated with processing blocks are analyzed. Operand restrictions and register groups can be configured to allow the use of more resource efficient multiplexing circuitry in a processor.

REFERENCES:
patent: 4104720 (1978-08-01), Gruner
patent: 6615341 (2003-09-01), Sih et al.
Computer Organization and Design by Hennessy and Patterson.
“Coding for Synthesis” http://toolbox.xilinx.com/docsan/xilinx4/data/docs/sim/coding5.html, Jul. 18, 2005, pp. 1-6.

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