4. Computer-aided design and analysis of circuits and semiconductor
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Generation of a specification of a processor of network packets

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Generation of clock gating function for synchronous circuit

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of design views having consistent input/output...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of engineering change order (ECO) constraints for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of engineering change order (ECO) constraints for...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
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Generation of graphical congestion data during placement...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of graphical design representation from a design...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of metal holes by via mutation

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of ordered interconnect output from an HDL...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of refined switching windows in static timing...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of refined switching windows in static timing...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of route rules

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of RTL to carry out parallel arithmetic operations

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of standard cell library components with...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing
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Generation of sub-netlists for use in incremental compilation

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of sub-netlists for use in incremental compilation

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generation of tests used in simulating an electronic circuit...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generic method and apparatus for implementing source...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generic methodology to support chip level integration of IP...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Generic non-volatile service layer

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
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