Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-02-27
2007-02-27
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
10819254
ABSTRACT:
The present invention is a method and apparatus for implementing a source synchronous interface in a platform using a Generic Source Synchronous Interface (GSSI) infrastructure. The GSSI infrastructure includes the GSSI bit slices and clock management system. The GSSI bit slice includes balanced cells and bit delay elements, and may be placed either within or close to IO buffers. The GSSI clock management system includes strategically placed frame delay elements with automatic on-chip calibration and control to satisfy various clock-data phase relationships. The GSSI methodology shows how different SSIs may be constructed by combining the common GSSI architecture with unique metal layer configurations. The GSSI architecture solves a critical challenge for platform-based design such as RapidChip™ and the like. The GSSI approach introduces a completely new way to implement various SSIs based on a common minimally diffused GSSI bit slice and clock management infrastructure. This enables one slice of a platform family to be used for many applications, removing the need to provide different slices with different diffused hard macros for different applications.
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Hao Hong
Hui Keven
Scharf William D.
Levin Naum
LSI Logic Corporation
Siek Vuthe
Suiter-Swantz PC LLO
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