Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-03-06
2007-03-06
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
10703100
ABSTRACT:
A reduction in the intersection of vias on the last layer (“VL”) and holes in the last thin metal layer (“MLHOLE”) can be achieved without degrading product yield or robustness or increasing copper dishing. The mutation of some dense redundant VLs to MLHOLEs decreases the number of intersections between VLs and MLHOLEs.
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Demm Ernst H.
Hirsch Alexander M.
Leung Pak
Wong Robert C.
Brinks Hofer Gilson & Lione
Dinh Paul
Infineon Technologies North America Corp.
United Microelectronics Corp.
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