Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-03
2006-10-03
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07117471
ABSTRACT:
Generation of consistent connection data for a first circuit embedded in a second circuit. In one approach, a master file is established with design data that includes for each pin in the embedded circuit, a hardware description language (HDL) pin name from an HDL description of the embedded circuit, a schematic pin name of the second circuit to which a corresponding pin in the embedded circuit is to connect, a signal direction associated with the pin, and a name of a clock to trigger a signal on the pin. A plurality of design views are generated from the master file. Each design view has a unique format relative to the other design views and includes for each pin in the embedded circuit design, at least the HDL pin name, the associated schematic pin name, and a signal direction associated with the pin.
REFERENCES:
patent: 2003/0131325 (2003-07-01), Schubert et al.
U.S Appl. No. 10/966,554, filed Oct. 15, 2004, Roberts et al.
U.S Appl. No. 10/966,993, filed Oct. 15, 2004, Roberts et al.
Gan Andy H.
Li Huimou Juliana
Vashi Mehul R.
Wang Qingqi
Maunu LeRoy D.
Xilinx , Inc.
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