Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-17
2006-01-17
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06988255
ABSTRACT:
A method and structure to determine timing windows in a static timing analysis of an integrated circuit design, determines for at least one node in the integrated circuit design, an initial set of sub-windows and merges the sub-windows of the initial set into a final set of sub-windows.
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Allen Robert J.
Arunachalam Ravishankar
Hathaway David J.
Bowers Brandon
Gibb I. P. Law Firm, LLC
Kotulak, Esq. Richard M.
Smith Matthew
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