Generic non-volatile service layer

Details Generic non-volatile service layer Generic non-volatile service layer

2011-06-21

2011-06-21

Levin, Naum (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Design of semiconductor mask or reticle

Analysis and verification

C716S106000, C716S111000, C714S025000, C714S030000, C713S151000

Reexamination Certificate

active

07966581

ABSTRACT:
Method and apparatus for constructing and operating an integrated circuit in an electronic device. In some embodiments, a generic service layer is integrated in a three dimensional integrated circuit and tested using a testing pattern stored in a non-volatile memory. The generic service layer is reconfigured to a permanent non-testing functional component of the integrated circuit.

REFERENCES:
patent: 6551857 (2003-04-01), Leedy
patent: 7064018 (2006-06-01), Madurawe
patent: 7219271 (2007-05-01), Kleveland et al.
patent: 7312109 (2007-12-01), Madurawe
patent: 7334159 (2008-02-01), Callaghan
patent: 7379327 (2008-05-01), Chen et al.
patent: 7402897 (2008-07-01), Leedy
patent: 7412343 (2008-08-01), Stroud et al.
patent: 7463062 (2008-12-01), Or-Bach et al.
patent: 7694196 (2010-04-01), Schnell et al.
patent: 7750421 (2010-07-01), Horng et al.
patent: 2005/0023656 (2005-02-01), Leedy
patent: 2005/0066226 (2005-03-01), Adams et al.
patent: 2005/0278666 (2005-12-01), Diamond
patent: 2007/0080448 (2007-04-01), DeMulder et al.
patent: 2008/0142959 (2008-06-01), DeMulder et al.
patent: 2008/0163139 (2008-07-01), Scheffer et al.
patent: 2008/0229269 (2008-09-01), Lamorey
patent: 2008/0284611 (2008-11-01), Leedy
patent: 2009/0063916 (2009-03-01), Vogelsang
patent: 2009/0106716 (2009-04-01), Aleksanyan et al.
patent: 2009/0129186 (2009-05-01), Schnell et al.
patent: 2009/0194768 (2009-08-01), Leedy
patent: 2009/0300441 (2009-12-01), Andreev et al.
patent: 2010/0061207 (2010-03-01), Trantham
patent: 2010/0083037 (2010-04-01), Oberlaender
Weisheng Zhao, Eric Belhaire, Bernard Dieny, Guillaume Prenat and Claude Chappert, “TAS-MRAM based Non-volatile FPGA logic circuit,” IEEE, 2007, 1-8.
Jing Li, “An Alternate Design Paradigm using Scaled Low Temperature Poly-Silicon Thin Film Transistor (LTPS TFT) for Low Power and Low-Cost Applications,” Sep. 2007, 1-90, Purdue University, US.

Affiliated with

Also associated with

Rating

Generic non-volatile service layer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Generic non-volatile service layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Generic non-volatile service layer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2643892