Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-03-20
2007-03-20
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10761156
ABSTRACT:
There is disclosed a method, and corresponding apparatus, for determining a clock gating function for a set of clocked state-holding elements, comprising the steps of: for each element, determining the conditions under which the element will hold its current value based only on those inputs which are common to all elements; and combining the conditions to form a gating function.
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Cunningham Paul Alexander
Wilcox Stephen Paul
Azuro (UK) Limited
Garbowski Leigh M.
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