Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-18
2007-09-18
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
11190879
ABSTRACT:
Computer-implemented method and system for generating an optimized description of an arithmetic function comprising at least two of an addition, a multiplication, and a rounding operation to be carried out on a plurality of data bits in a plurality of registers of an electronic circuit, the method comprising the steps: obtaining a first description of the arithmetic function; decomposing the first description to obtain a second description comprising individual binary and logical operations on data bits, wherein the data bits are arranged to their proper place value, the second description being substantially arithmetically equivalent to the first description; obtaining a third description by parallelizing at least two of the binary and logical operations on the data bits in the second description; providing a forth description comprising operations for each data bit comprised in the third description in a hardware description language as the optimized description of the electronic circuit.
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patent: 6044392 (2000-03-01), Anderson et al.
patent: 2004/0006584 (2004-01-01), Vandeweerd
European Search Report issued Aug. 10, 2005 for Appl. No. EP 02257666,2 pages.
Inoue, Toshiaki et al., “An Area-Effective Datapath Architecture for Embedded Microprocessors and Scalable Systems”, IEICE Transactions on Electronics; vol. E84-C, No. 8, Aug. 2001, (2001), pp. 1014-1020.
Broadcom Corporation
Do Thuan
Sterne Kessler Goldstein & Fox PLLC
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