Architectural level throughput based power modeling...
Architectural structure of a process netlist design tool
Architecture and interconnect scheme for programmable logic...
Architecture and interconnect scheme for programmable logic...
Architecture and method for partially reconfiguring an FPGA
Architecture and/or method for using input/output affinity...
Architecture for a sea of platforms
Architecture for a sea of platforms
Architecture for efficient implementation of serial data...
Architecture for programmable on-chip termination
Architecture specific code
Area array routing masks for improved escape of devices on PCB
Area array routing masks for improved escape of devices on PCB
Area efficient delay circuits
Area ratio/occupancy ratio verification method and pattern...
Arrangement for partitioning logic into multiple field...
Arrangements for developing integrated circuit designs
Arranging/wiring method of semiconductor device, and...
Array transformation in a behavioral synthesis tool
Array-based architecture for molecular electronics