Architectural level throughput based power modeling...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07818696

ABSTRACT:
A method for estimating power dissipated by a processor core processing a workload-includes analyzing a reference test case to generate a reference workload characteristic, analyzing an actual workload to generate an actual workload characteristic, performing a power analysis for the reference test case to establish a reference power dissipation value and estimating an actual workload power dissipation value responsive to the actual and reference workload characteristics and the reference power dissipation value.

REFERENCES:
patent: 6871172 (2005-03-01), Sanders
patent: 2004/0172519 (2004-09-01), Nakajima

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