Architecture for a sea of platforms

Details Architecture for a sea of platforms Architecture for a sea of platforms

2002-01-10

2003-10-28

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

06640333

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to the field of semiconductors and semiconductor design, and particularly to an architecture for a configurable platform.
BACKGROUND OF THE INVENTION
Integrated circuits have become a necessary part of everyday modern society. From wireless phones and information handling systems, to household appliances and data storage systems, a wide range of integrated circuits are utilized to provide a broad range of functionality. To provide this functionality, integrated circuits may need to be specialized to have the functions necessary to achieve the desired results, such as through the provision of an application specific integrated circuit (ASIC). An ASIC is typically optimized for a given function set, thereby enabling the circuit to perform the functions in an optimized manner. However, there may be a wide variety end-users desiring such targeted functionality, with each user desiring different functionality for different uses.
Additionally, more and more functions are being included within each integrated circuit. While providing a semiconductor device that includes a greater range of functions supported by the device, inclusion of this range further complicates the design and increases the complexity of the manufacturing process. Further, such targeted functionality may render the device suitable for a narrow range of consumers, thereby at least partially removing an “economy of scale” effect that may be realized by selling greater quantities of the device.
Thus, the application specific integrated circuit business is confronted by the contradiction that the costs of design and manufacture dictate high volumes of complex designs. Because of this, the number of companies fielding such custom designs is dwindling in the face of those rapidly escalating costs.
Therefore, it would be desirable to provide a platform architecture of the present invention.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to platform architecture. In a first aspect of the present invention, a system for providing distributed dynamic functionality in an electronic environment includes a plurality of platforms. The platforms are suitable for providing a logic function, and include embedded programmable logic, memory and a reconfigurable core. The logic, memory and reconfigurable core are communicatively coupled via a fabric interconnect. A map is also included which expresses logic functions of the plurality of platforms.
In a second aspect of the present invention, a method for providing an executable suitable for being employed by a plurality of platforms includes receiving a program of instructions and determining availability of a plurality of platforms for performing the program of instructions. The plurality of platforms include embedded programmable logic, memory and a reconfigurable core. The logic, memory and reconfigurable core are communicatively coupled via a fabric interconnect that is isochronous. The availability of the platforms includes at least one of load value of the platforms and functionality of the platforms. The program of instructions is translated into an executable suitable for operation by the plurality of platforms based on the determined availability.
In a third aspect of the present invention, a system for providing distributed dynamic functionality in an electronic environment includes a plurality of platforms communicatively coupled via an isochronous fabric. The platforms are suitable for providing a logic function, and include embedded programmable logic, memory and a reconfigurable core, which are communicatively coupled. A map is also included which expresses availability of the plurality of platforms for performing a logic function.
It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.


REFERENCES:
patent: 5940393 (1999-08-01), Duree et al.
patent: 6496508 (2002-12-01), Breuckheimer et al.
patent: 6553395 (2003-04-01), Marshall et al.
patent: 01202397 (2000-01-01), None
patent: 02202886 (2000-10-01), None
Sea-of-IP: an ocean of design possibilities; www. semiconductors.philips.com/technology.sea_of_ip/index.html.
CMP EE-TIMES.com “Semiconductors—Tensilica Navigates “Sea of Processors” Designs” by Chris Edwards Jun. 14, 2001, EDTN Network—Author(s)—Chris Edwards.
USC Office of Technology Licensing Self-Reconfigurable Programmable Logic Device by Reetinder Sidhu et al. File #3115 Tel. 213-743-2282 Cindy Kakuk Mrktng Assoc. USC Los Angeles, CA 90007—Author(s)—Reetinder Sidhu et al.
“Route Packets, Not Wires: On-Chip Interconnection Networks” by William J. Daily, et al.; Stanford University, Computer Systems Laboratory, Stanford, CA; Jun. 2001.

Affiliated with

Also associated with

Rating

Architecture for a sea of platforms does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Architecture for a sea of platforms, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Architecture for a sea of platforms will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3162074