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Concurrently modeling delays between points in static timing...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate

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Constraint based retiming of synchronous circuits

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Constraint management and validation for template-based...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Control signal source replication

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Controlling operation of a digital system utilizing register...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Conversion of a high-level graphical circuit design block to...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Cost-benefit optimization for an airgapped integrated circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Delay analysis apparatus, delay analysis method and computer...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Design Structure for switching digital circuit clock net...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Design-for-test-aware hierarchical design planning

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Design-For-testability planner

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Determining a cycle basis of a directed graph

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Determining clock skew between nodes of an integrated circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Directed design space exploration

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Dual path static timing analysis

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Dynamic critical path detector for digital logic circuit paths

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Efficient exhaustive path-based static timing analysis using...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Enhanced verification through binary decision diagram-based...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Enhancing formal design verification by reusing previous...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Fast reduction of system models

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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