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Technique for creating analysis model and technique for...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate

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Techniques for use with automated circuit design and...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Temporal decomposition for design and verification

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate

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Temporal replicant simulation

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Timing analysis of a mapped logic design using physical delays

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Timing analysis when integrating multiple circuit blocks...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Translating a user design in a configurable IC for debugging...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Transmission delay analyzing apparatus, medium recording...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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Two-pass method for implementing a flexible testbench

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
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