Conversion of a high-level graphical circuit design block to...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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Details

C716S101000, C716S102000, C716S104000, C716S111000, C716S139000

Reexamination Certificate

active

07992111

ABSTRACT:
Approaches for processing an electronic circuit design. In one embodiment, the graphical model of an outer subsystem block and an inner subsystem block are translated into a high-level language (HLL) program. The HLL program includes a specification of a first function corresponding to the outer subsystem block and within the specification of the first function a specification of a second function corresponding to the inner subsystem block. The specification of the first function references a parameter of the outer subsystem block and specifies invocation of the second function. The specification of the second function specifies invocation of a third function corresponding to a leaf block in the inner subsystem block. The specification of the first function references a variable corresponding to the parameter, and that variable is referenced by the second or third functions. Execution of the HLL program instantiates a model of the design.

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