Cost-benefit optimization for an airgapped integrated circuit

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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Details

C716S111000, C716S113000, C716S115000, C716S132000

Reexamination Certificate

active

07979824

ABSTRACT:
A computer implemented method, apparatus and program product provide automated processes for determining the most cost-effective use of airgaps in a microchip. The performance gains realized by using airgaps for a given net or layer may be calculated. These improvements may be paired to a monetary cost associated with implementing the applicable airgaps at that net/layer. The paired benefit and cost of the airgap scenario may be compared to other possible airgap uses at other layers
ets to determine which airgaps provide the best improvement for the lowest cost.

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