Enhancing formal design verification by reusing previous...

Details Enhancing formal design verification by reusing previous... Enhancing formal design verification by reusing previous...

2009-04-01

2011-10-18

Memula, Suresh (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Logic design processing

Reexamination Certificate

active

08042078

ABSTRACT:
A method, a system and a computer program product for re-using verification results associated with a circuit design to eliminate a formal verification re-run associated with a subsequent verification of the circuit design. A Verification Data Re-use (VDR) utility initiates the creation of a first netlist data structure and a first set of target signatures for the circuit design. The VDR utility initiates an initial functional verification run of the circuit design and stores the results of the verification run. When a subsequent verification of the initial design is initiated, the VDR utility compares the first set of target signatures with a second set of target signatures for the subsequent verification run. A match of target signatures indicates that corresponding design targets have an identical functionality and the VDR utility re-uses verification results from the initial verification run to eliminate an extensive formal verification re-run for the circuit design.

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