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Dual slope sense clock generator

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate

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Dual stage DRAM memory equalization

Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate

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Dual stage sense amplifier for dynamic random access memory

Static information storage and retrieval – Read/write circuit – For complementary information
Patent

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Dual threshold voltage sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate

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Dual-bit nitride read only memory cell with parasitic...

Static information storage and retrieval – Read/write circuit – Having bipolar circuit element
Reexamination Certificate

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Dual-edge triggered multiplexer flip-flop and method

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Dual-port array with storage redundancy having a cross-write ope

Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent

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Dual-port memory array using shared write drivers and read...

Static information storage and retrieval – Read/write circuit
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Dual-port memory device

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Dual-port memory with asynchronous control of serial data memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Dual-port memory with inhibited random access during transfer cy

Static information storage and retrieval – Read/write circuit – Serial read/write
Patent

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Dual-port read/write RAM with single array

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Dual-port type semiconductor integrated memory circuit

Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent

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Dual-ported CAMs for a simultaneous operation flash memory

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Dual-threshold-voltage two-port sub-threshold SRAM cell...

Static information storage and retrieval – Read/write circuit
Reexamination Certificate

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Dual-to-single-rail converter for the read out of static...

Static information storage and retrieval – Read/write circuit
Reexamination Certificate

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Dummy cell arrangement for an MOS memory

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Dummy cell for providing a reference voltage in a memory array

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Dummy cell structure for MIS dynamic memories

Static information storage and retrieval – Read/write circuit – Differential sensing
Patent

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Dummy memory cells for high accuracy self-timing circuits in...

Static information storage and retrieval – Read/write circuit – Bad bit
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