Dual-threshold-voltage two-port sub-threshold SRAM cell...

Details Dual-threshold-voltage two-port sub-threshold SRAM cell... Dual-threshold-voltage two-port sub-threshold SRAM cell...

2009-12-30

2011-12-06

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

C365S230050, C365S154000

Reexamination Certificate

active

08072818

ABSTRACT:
The invention relates to a dual-threshold-voltage two-port sub-threshold SRAM cell apparatus. The above-mentioned apparatus comprises a first inverter, a second inverter, an access transistor and a read buffer. The first inverter and the second inverter include a plurality of first operating elements and a plurality of second operating elements for storing data. The access transistor is coupled to the first inverter and the second inverter, wherein the first operating elements and the second operating elements are high threshold voltage operating elements and the access transistor is low threshold voltage operating transistor. The read buffer is used for performing a read operation.

REFERENCES:
patent: 6307805 (2001-10-01), Andersen et al.
patent: 6519176 (2003-02-01), Hamzaoglu et al.
patent: 7672152 (2010-03-01), Kulkarni et al.
patent: 2009/0175068 (2009-07-01), Ouyang et al.

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