Back bias voltage generating circuit
Back bias voltage generator circuit of a semiconductor memory de
Back-bias voltage generator for decreasing a current...
Back-bias voltage generator with temperature control
Balanced bit line pull up circuitry for random access memories
Balanced load memory and method of operation
Balanced sense amplifier control for open digit line...
Balanced sense amplifier control for open digit line...
Balanced sense amplifier control for open digit line...
Bandgap reference circuit
Bandgap voltage and temperature coefficient trimming algorithm
Bandgap voltage reference generator
Bank architecture for a non-volatile memory enabling simultaneou
Bank based self refresh control apparatus in semiconductor...
Bank erasable, flash-EPROM memory
Bank selectable parallel test circuit and parallel test...
Banked memory circuit
Bi-directional data bus scheme with optimized read and write cha
Bi-directional data bus scheme with optimized read and write cha
Bi-directional data input/output circuit of a synchronous memory