Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1990-09-07
1993-05-04
Clawson, Jr., Joseph E.
Static information storage and retrieval
Read/write circuit
Bad bit
365221, 3652257, 36523003, 36523004, 36523005, 365239, 371 102, G11C 2900
Patent
active
052087751
ABSTRACT:
If a defect is occurred in a certain normal memory when a dual-port memory device having a first and a second normal memory carries out the data transfer by a first and a second transfer signal, either of the first or the second transfer signals which corresponds to the defective normal memory is selected by a redundant transfer signal generator. The redundant transfer signal makes a redundant transfer gate turned on to transfer the data between a redundant RAM and a redundant SAM, and to substitute for the defective part of the normal memory. Thus, the defective part of the normal memory means which is occurred during the split transfer of data can be replaced by the single redundant circuit, so that the size of the memory device becomes minimize.
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Clawson Jr. Joseph E.
Samsung Electronics Co,. Ltd.
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