Sense amplifier circuit for detecting degradation of digit lines
Sense amplifier circuit for detecting degradation of digit lines
Sense amplifier control of a memory device
Sense amplifier screen circuit and screen method thereof
Sensing test circuit
Shared data lines for memory write and memory test operations
Shared sense amplifier scheme semiconductor memory device...
Short disturb test algorithm for built-in self-test
Short write test mode for testing static memory cells
Signal margin testing system for dynamic RAM
Single cell reference scheme for flash memory sensing and progra
SMI memory read data capture margin characterization...
Soft errors handling in EEPROM devices
SOI array sense and write margin qualification
Special mode enable transparent to normal mode operation
SRAM and testing method of SRAM
Stability test for silicon on insulator SRAM memory cells...
Standby current detecting circuit for use in a semiconductor mem
Static memory unit having a plurality of test modes, and compute
Static RAM circuit for defect analysis