Static RAM circuit for defect analysis

Details Static RAM circuit for defect analysis Static RAM circuit for defect analysis

1998-04-30

2000-06-27

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

365154, 365203, G11C 700

Patent

active

060814659

ABSTRACT:
Small feature CMOS defect analysis of SRAM circuits is made less time consuming with the inclusion of an in-circuit test connection which is brought to external contact pads. External measurement and circuit forcing are accomplished via the external contact pads. A fault library for comparison to automated tests results provides faster resolution of process defects.

REFERENCES:
patent: 4835458 (1989-05-01), Kim
patent: 5034923 (1991-07-01), Kuo et al.
patent: 5416740 (1995-05-01), Fujita et al.
patent: 5428574 (1995-06-01), Kuo et al.
patent: 5469076 (1995-11-01), Badyal et al.
patent: 5526314 (1996-06-01), Kumar
patent: 5615157 (1997-03-01), Nakashima et al.

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