Memory and circuit for accessing data bits in a memory array in

Memory and method of reading out of the memory

Memory architecture for read and write at the same time...

Memory architecture using new power saving row decode implementa

Memory array organization for static arrays

Memory array reconfiguration for testing

Memory based line-delay architecture

Memory based line-delay architecture

Memory cache with low power consumption and method of operation

Memory cell arrangement supporting bit-serial arithmetic

Memory circuit

Memory circuit and semiconductor device including the memory...

Memory device for multiplexing input and output operation

Memory device having a latching multiplexer and a multiplexer bl

Memory device having reduced layout area

Memory device having selectable number of output pins

Memory device wherein a shadow register corresponds to each memo

Memory device with parallel interface

Memory device with separate read and write gate voltage...

Memory module for use in a large reconfigurable memory